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[Debugger] Load/Store instructions don't indicate writeback flag #1915

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lunasorcery opened this issue Oct 24, 2020 · 2 comments
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[Debugger] Load/Store instructions don't indicate writeback flag #1915

lunasorcery opened this issue Oct 24, 2020 · 2 comments

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@lunasorcery
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Observed at 4aed125.

The disassembler appears not to note the writeback flag when disassembling ldr/str instructions.

For example:

ldrh r8, [r7, r2]!  ; opcode e1b780b2
ldrh r8, [r7, r2]   ; opcode e19780b2

mGBA will display both instructions as ldrh r8, [r7, r2], missing the trailing !, but will correctly perform the writeback when executing.

This appears to affect all forms - all of ldr, ldrh, ldrb, str, strh, strb, with both register offsets and immediate offsets.
@endrift
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endrift commented Oct 24, 2020

I'm pretty sure this used to work. It may be a recent regression. Checking now.

endrift added a commit that referenced this issue Oct 24, 2020
@endrift
ARM Decoder: Fix decoding pre-indexed writeback instructions (fixes #…
67cf9b7 
…1915)
@endrift
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endrift commented Oct 24, 2020

This was indeed a regression, but not a recent one. It broke in 0.2.0.

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